diff --git a/MachineModeCore.sv b/MachineModeCore.sv
index 31058ee7a154b8860a523c65445a1606eb1fcf3e..6bde20d79162726e0dac6b887af888a05413ed98 100644
--- a/MachineModeCore.sv
+++ b/MachineModeCore.sv
@@ -2498,11 +2498,11 @@ module MachineModeCore(clock, reset, io_reset_rst_n, io_reset_boot_addr, io_inst
   assign \executionUnits_0._GEN_95  = _0237_ &  \executionUnits_0._GEN_60 ;
   assign \executionUnits_0._GEN_96  = _0237_ &  \executionUnits_0._GEN_63 ;
   assign \executionUnits_0._GEN_97  = _0237_ &  \executionUnits_0._GEN_66 ;
-  assign \executionUnits_0._GEN_115  = \executionUnits_0.io_reg_reg_read_data1  &  _0118_;
+  assign \executionUnits_0._GEN_115  = ( ~ \executionUnits_0.io_reg_reg_read_data1 )  &  ( ~ _0118_ );
   assign \executionUnits_0._GEN_121  = \executionUnits_0._GEN_119  &  _0237_;
   assign _0033_ = \executionUnits_0._GEN_121  &  \executionUnits_0._GEN_48 ;
   assign \executionUnits_0._GEN_125  = _0081_ &  _0382_;
-  assign \executionUnits_0._GEN_126  = { 27'h0000000, instruction[19:15] } &  _0118_;
+  assign \executionUnits_0._GEN_126  = ( ~ { 27'h0000000, instruction[19:15] } ) &  ( ~ _0118_ );
   assign \executionUnits_0._GEN_130  = \executionUnits_0._GEN_129  &  \executionUnits_0.csrs_22_2.mtie ;
   assign \executionUnits_0._GEN_131  = \executionUnits_0._GEN_129  &  \executionUnits_0.csrs_22_2.meie ;
   assign \executionUnits_0._GEN_132  = \executionUnits_0._GEN_130  &  \executionUnits_0.csrs_9_2.mtip ;